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Hierarchical Control Theory

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Abstract

Hierarchical control can be interpreted as an attempt to handle complex problems by decomposing them into smaller subproblems and reassembling their solutions into a "functioning" hierarchical structure. So far, heuristic approaches have been prevalent. However, they cannot guarantee that the overall solution does indeed meet the specifications. In contrast, our project aims at a formal synthesis method that can provide such a guarantee.

People involved

Cooperation

Description

Complexity represents a major concern in many control problems, and it is common engineering knowledge that suitable decomposition techniques form a necessary ingredient for any systematic treatment of complex control problems. Hierarchical approaches, where several control layers interact, are a particularly attractive way of problem decomposition as they provide an extremely intuitive control architecture. Complexity problems are especially pronounced for hybrid control synthesis problems, and this has motivated the particular line of research described below.

In cooperation with Thomas Moor from Erlangen University and Jen Davoren from Melbourne University, we have developed a hierarchical control synthesis framework which is general enough to encompass both continuous and discrete levels. Unlike heuristic approaches, our synthesis framework guarantees that the control layers interact "properly" and do indeed enforce the overall specifications for the considered plant model. Its elegance stems from the fact that the specifications for lower control levels can be considered suitable abstractions which may be used as a basis for the synthesis of high-level controllers. Formulating specifications for the lower control levels may rely on engineering intuition. In fact, our approach allows to encapsulate engineering intuition within a formal framework, hence exploiting positive aspects of intuition while preventing misguided aspects from causing havoc within the synthesis step.

Two-level control architecture.

To keep exposition reasonably straightforward, we focus on the two-level control architecture shown in the figure on the right. Low-level control is implemented by an intermediate layer communicating with the plant via low-level (physical) signals Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): u^{\mathrm{L}}

and

Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): y^{\mathrm{L}}

and with the high-level supervisor via high-level (abstract) signals

Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): u^{\mathrm{H}}

and Failed to parse (PNG conversion failed;

check for correct installation of latex, dvips, gs, and convert): y^{\mathrm{H}} . Apart from implementing low-level control mechanisms corresponding to high-level commands Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): u^{\mathrm{H}} , the intermediate layer aggregates low-level measurement information Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): y^{\mathrm{L}}

to provide high-level information Failed to parse (PNG conversion failed;

check for correct installation of latex, dvips, gs, and convert): y^{\mathrm{H}}

to the high-level

supervisor. Aggregation may be both in signal space and in time, i.e., the time axis for high-level signals may be "coarser" than for low-level signals. We denote the behaviours of low-level plant model, intermediate layer and high-level control by Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{p}}^{\mathrm{L}} , Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{im}} , and Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{sup}}^{\mathrm{H}} , respectively. Note that in this scenario Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{p}}^{\mathrm{L}}

and Failed to parse (PNG conversion failed;

check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{sup}}^{\mathrm{H}}

are behaviours on Failed to parse (PNG conversion failed;

check for correct installation of latex, dvips, gs, and convert): W_{\mathrm{L}}

and

Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): W_{\mathrm{H}} , while Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{im}}

is a behaviour on Failed to parse (PNG conversion failed;

check for correct installation of latex, dvips, gs, and convert): W_{\mathrm{L}} \times W_{\mathrm{H}} , where Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): W_{\mathrm{H}} := U_{\mathrm{H}} \times Y_{\mathrm{H}}

and Failed to parse (PNG conversion failed;

check for correct installation of latex, dvips, gs, and convert): W_{\mathrm{L}} := U_{\mathrm{L}} \times Y_{\mathrm{L}}

represent the high and

low-level signal sets.

The control synthesis task then is to come up with a two-level controller Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): (\mathfrak{B}_{\mathrm{im}},\mathfrak{B}_{\mathrm{sup}}^{\mathrm{H}})

 such that (i) the overall controller Failed to parse (PNG conversion failed;

check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{im}}^{\mathrm{L}}[\mathfrak{B}_{\mathrm{sup}}^{\mathrm{H}}]

restricts the plant behaviour to a given specification behaviour Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{spec}}^{\mathrm{L}} , (ii) the overall controller is admissible to the plant model, (iii) the high-level controller is admissible to Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{im}}^{\mathrm{H}}[\mathfrak{B}_{\mathrm{p}}^{\mathrm{L}}] , i.e., the plant under low-level control. In this context, admissibility of a controller means the following: the controller respects the plant's input/output structure, and any trajectory that plant and controller have "agreed on" in the past can be extended into the future.

In [1] and [2], we have discussed which properties of plant model and control layers will guarantee that admissibility conditions (ii) and (iii) hold. In particular, we have shown that very weak requirements on plant model and high-level supervisor will suffice for any combination of the intermediate layers shown in the figure below.

Intermediate layers implementing switching between low-level controllers.
Intermediate layers implementing measurement aggregation in time and signal space.

In fact, these types of intermediate layers are precisely the ones that are needed in most application problems. In [1],[2], we have also proposed a bottom-up design procedure for Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{im}}

and Failed to parse (PNG conversion failed;

check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{sup}}^{\mathrm{H}}

in a first step, the intended

relation between high-level and low-level signals is formalised by a specification Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{spec}}^{\mathrm{HL}} . Clearly, it is in this step where engineering intuition is "embedded" into our formal framework. In a second step, using standard control synthesis methods, we need to design the intermediate layer such that the specification Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{spec}}^{\mathrm{HL}}

 holds. In  a third step, synthesis

of high-level control is addressed. It can be based on a suitable abstraction of Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{im}}^{\mathrm{H}}[\mathfrak{B}_{\mathrm{p}}^{\mathrm{L}}] , i.e. the plant model under low-level control, and a suitable translation of Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{spec}}^{\mathrm{L}}

into high-level specifications. In particular, we

propose to use the high-level projection of Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{spec}}^{\mathrm{HL}}

 as an abstraction of

the plant model under low-level control. If both synthesis steps succeed, we can guarantee that the resulting overall controller indeed enforces the original specifications Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{spec}}^{\mathrm{L}}

 for the

underlying plant model Failed to parse (PNG conversion failed; check for correct installation of latex, dvips, gs, and convert): \mathfrak{B}_{\mathrm{p}}^{\mathrm{L}} .

In [2], we have also discussed how the remaining degrees of freedom can be used to address performance optimisation issues. The potential of our approach has been demonstrated by applying it to a multiproduct batch control problem, where the specification is to produce the desired product volumes with minimal cost subject to quality and safety constraints [3] [2].

We are currently mostly interested in the implications of tightening/relaxing subsystem specifications, in characterising achievable performance for specific control architectures, and in demonstrating the potential of the suggested approach by applying it to specific applications. For the latter purpose, a hybrid chemical engineering benchmark for hierarchical control [4] has been proposed by the Fachgebiet Dynamik und Betrieb technischer Anlagen (G. Wozny, H. Arellano-Garcia) at TU Berlin and our group.


Publications

  1. 1.0 1.1
    Thomas Moor, Jörg Raisch, Jen M. Davoren. Admissibility Criteria for a Hierarchical Design of Hybrid Control Systems. In Proc. ADHS03 — IFAC Conference on Analysis and Design of Hybrid Systems, pages 389–394, St. Malo, France, 2003.
  2. 2.0 2.1 2.2 2.3
    Jörg Raisch, Thomas Moor. Hierarchical Hybrid Control of a Multiproduct Batch Plant, volume 322 of Lecture Notes in Control and Information Sciences, pages 99–216. Springer-Verlag, 2005.
  3. Thomas Moor, Jörg Raisch. Hierarchical Hybrid Control of a Multiproduct Batch Plant. In Proc. 16th IFAC World Congress, Prague, Czech Republic, 2005.
  4. H. Arellano-Garcia, S. Geist, G. Wozny, J. Raisch. Benchmark for Hierarchical Plantwide Control of Hybrid Chemical Processes. In Proc. European Symposium on Computer Aided Process Engineering – ESCAPE20, pages 541–546, 2010.
X. David-Henriet, J. Raisch,, L. Hardouin. Consistent Control Hierarchies with Top Layers Represented by Timed Event Graphs. In Proc. of the 17th International Conference on Methods and Models in Automation and Robotics, IEEE, Międzyzdroje, Poland, 2012.

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